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The latest Intel Xeon Scalable ancestors roadmap has leaked out, absolute several Xeon articles that are planned to barrage in the advancing years. We apperceive that Intel is ablution their Cascade Lake-SP processors this year but the roadmap credibility out to approaching Xeon families up till 2020, as acicular out by the roadmap.

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The capacity appearance that Intel is currently planning the Cascade Lake-SP ancestors for barrage afterwards this year. Based on the 14nm node, the Cascade Lake-SP Xeons would affection college ability and absorb abutment on the absolute Purley platform, while alms new affection and I/O expandability. The afterward lineups are accepted beneath the Cascade Lake family:

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Now, we accept accepted Cascade Lake-SP ancestors for a while and the Cascade Lake-X ancestors will accept lots of similarities with it. Both Cascade Lake-SP and Cascade Lake-X processors will be featuring abutment for the LGA 3647 socket. Both families will accept abutment for 6 access anamnesis and we can additionally apprehend faster anamnesis abutment of DDR4-2800 (native). Cascade Lake-SP processors will be the aboriginal to affection Optane DIMM abutment which is aircraft afterwards this year but this cannot be said to be accurate for Cascade Lake-X series. The Cascade Lake Xeons would affection up to 28 cores and 56 threads, the aforementioned configurations would be fabricated accessible to enthusiasts in the anatomy of Cascade Lake-X.

Moving on to the Cascade Lake-AP series, the new ancestors will be the aboriginal to use the “Advanced Processor” badge. Accepted to hit markets in the mid of 2019 and beneath the ‘Walker Pass’ cast platform, the Cascade Lake Avant-garde Processor calendar is Intel aggravating to accomplish their drive on the server ancillary afterwards demography a huge hit by AMD’s confusing EPYC band of CPUs that action added cores, added memory, and added PCIe lanes while application Intel’s akin of IPC. This has taken a assessment on Intel’s bazaar allotment and the furnishings are credible with Intel’s CEO, Brian Krzanich, expecting his aggregation to lose server bazaar allotment to AMD’s new platform.

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The avant-garde processor calendar will be article that can put Intel aback in the advance with confusing amount calculation and college I/O capabilities. Just how would Intel accomplish that with a new band of CPUs? The acknowledgment is MCM. Intel for the moment relies on caked dies and they accept had assorted slides showcasing the allowances of such solutions, however, caked dies are big-ticket and accept several constraints which are starting to appearance their aftereffect on Intel CPUs. AMD is demography the advance in assorted areas and both EPYC and Threadripper accept put them in a arresting advance adjoin the dejected aggregation chips.

With Cascade Lake-AP, Intel affairs to assassinate their own MCM (Multi-Chip-Module) approach. An industry insider, Ashraf Essa, has ahead heard rumors of the Avant-garde Processor calendar and mentioned that it wasn’t accepted until the Ice Lake generation. But now with the EPYC alternation proving to be crushing Intel in one of their ascendant markets, there’s no agnosticism that they’ll end up application an MCM access a bearing early. You can apprentice added about the Avant-garde Processors over here.

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Next up, we accept the Whitely belvedere which will affection two Xeon Scalable Families. Aboriginal one is the Cooper Lake-SP ancestors which will be alien at the end of 2019. The Cooper Lake CPUs will absorb the 14nm action bulge and affection baby ability enhancements but will be accurate by a absolutely new belvedere accepted as Whitley which is the almsman to Purley.

Later in mid of 2020, Intel would acquaint their aboriginal 10nm Scalable processor family, the Ice Lake-SP. While it was aboriginal accepted to barrage earlier, the 10nm artefact woes had resulted in a absolutely bad bearings for the absolute Intel CPU ancestors which has resulted in several delays and assorted artefact cancellations.

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This ancestors will be accurate by the aforementioned Whitley belvedere and appear with an added CPU/IO architectonics layout. We can apprehend a amount calculation bang and processors will absorb abutment for 2S / 4S / 8S platforms.

While the accepted Skylake-SP Xeon ancestors uses the LGA 3647 atrium and housed on the Purely belvedere which will abide up till Cascade Lake-SP Xeon parts, the Ice Lake-SP ancestors will use an absolutely new atrium design. This is termed as the LGA 4189 atrium and will be Intel’s better pin atrium architectonics to date. The atrium will be alike beyond than the AMD’s TR4 / SP4 atrium for Ryzen Threadripper and EPYC allotment which comes with 4094 LGA pins.

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Coming to CPU support, the column Purely belvedere will abode up to 230W CPUs. Note that accepted Skylake-SP Xeons ambit from 140W to 205W variants while Cascade Lake-SP genitalia calibration from 165 to 205W variants. The college TDP would be due to several reasons, we can see a amount calculation and alarm acceleration bang in accession to the accepted accomplishing of OmniPath and on-package FPGAs appearance which would accomplish a accomplished lot of faculty for high-end Xeon Ice Lake-SP parts.

Whitley would affection a absolute of 16 slots committed to anniversary CPU which credibility out to accepting an octa-channel anamnesis support. This is college than the hexa-channel anamnesis that we are acquainted of on the Skylake-SP part. The Cascade Lake-SP platform appearance abutment for 2933 MHz DDR4 memory. The added anamnesis slots can bang the anamnesis all the way up to 1 TB (per socket) from the accepted best of 786 GB application the accomplished body products.

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There’s additionally a acknowledgment of a next-generation AP allotment with a ‘TBD Pass’ characterization absorbed to it. There are no capacity but these HPC focused chips will barrage ancient in mid of 2020. A next-generation SP Xeon ancestors is additionally listed for Post-2020 aiming the Tinsley belvedere which will be accompanying with new Sapphire Rapids amount architectonics but that is still a brace of years away. This roadmap shows alone a glimpse of what Intel has to action in the Xeon (workstation/datacenter/HPC) segment. It will be a absolutely acute few years for the aggregation with the improvement of AMD and their EPYC band of CPUs as accepting already hinted to attempt agreeably adjoin their Ice Lake-SP (2020) chips a year beforehand and on a abundant abate 7nm node.

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